Narasinga Rao joined ORNL as a software engineer in the Future Technology Group (FTG) in 2019. Narasinga Rao holds the position of a Senior R&D Staff and Group Leader for the Architecture and Performance Group in the Computer Science and Mathematics Division. His current research is on heterogeneous computing, FPGA acceleration, Neuromorphic computing (Spiking Neural Network accelerators) and RISC-V based accelerators. Prior to this, he has worked in Samsung R&D Institute Bangalore (SRIB) for ~8 years on fixed point deep learning inference framework, Samsung Reconfigurable Processors development toolchain (compiler, cycle accurate simulators, etc.) and architecture exploration.
Narasinga received Ph.D. from K.U.Leuven and IMEC R&D (Belgium) in 2012 and M.Tech in Computer Science and Engineering from Indian Institute of Technology Delhi (IIT-D, India).
Links
Publications
Sep, 2026
Conference Paper
IRIS-MASH: Efficient Multi-device Asynchronous Multi-Stream Heterogeneous Computing
Jul, 2026
Conference Paper
PowerMappeR: Power-Optimized Mapping of SNNs onto ReRAM Crossbars coupled via Packet-Switched NoCs
News
February 2, 2026
6 MIN READ
Characterizing GPU Energy Usage in Exascale-Ready Portable Science Application